EE 2231 Chapter : EE2231 Lab9
Document Summary
To characterize enhancement and depletion-mode field-effect transistors, and to implement a cmos inverter. Connect the circuit in figure 1, measure the voltages at points g (the gate electrode) and d (the drain electrode) as the input voltage is varied from 0 to 5v in volt increments. Then compute the drain current from the voltage drop across the 10k drain resistor using the following formula: id=(5-vd)/10k. 2, measure the voltage at the gate electrode and the drain electrode as the input voltage is varied from - Then compute the drain current as before in procedure one. 3, measure the voltage as the input is varied from 0 to 5v in 1/2v steps. (all figures are on page 6 of this report) Procedures: after assembling the circuit in figure 1, the following voltages were recorded. There is a slight difference between the two voltages. Lab session #8 bipolar transistors: after assembling the circuit in figure 2, the following voltages were recorded.
