ECE 120 Lecture 26: lecture_26

• School: University of Illinois
• Department: Electrical and Computer Engineering
• Course: ECE 120
• Professor: Kindratenko Volodymyr

Document Summary

We will work with static memory only. Memory model: used primarily for main memory, storage cell contains a capacitor (about 1- 2 transistors), charge must be refreshed every 10-20milisec: more compact, slower than sram but cheaper than sram, volatile (content is loss when power is off) You can think of computer memory as being one big array of data. The address serves as an array index. Each address refers to one word of data. You can read or modify the data at any given memory address, just like you can read or modify the contents of an array at any given index. To interact with such memory, we need: k-bit address line, n-bit data line. Memoryhybrid ram/romramromdramsramflash memoryepromprommask romddr sdramfpm dramedo dramrambus dramvideoram:mpdrameepromcontentaddress linesk000000011001010000000111111111100101011001010n128 x 8 memoryk=7 and n=8ece 120. This block diagram introduces the main interface to ram. The ram would need 24 address lines.