EECS 373 Midterm: EECS 373 e2001b1
Document Summary
Isas, alignment, and endian modes [20 points: consider the instruction addi r2, r3, n , where n is an immediate. Iv. bdnzt eq, target: i, i and ii, iii and iv, iv, none, which of the following transaction scenarios give(s) rise to incorrect/unpredictable bus operation, one master, one slave. Several masters, several slaves: i, ii, i and iii, iii and iv, ii, iii, and iv, which of the following statements are always true, big-endian machines can support aligned accesses only with a 32-bit data bus. Little-endian machines can support aligned accesses even with an 8-bit data bus. It is possible for a big-endian machine to support unaligned accesses. It is possible for a little-endian machine to support unaligned accesses: i and ii, ii, ii and iii, iii and iv, ii, iii, and iv. Questions 6 9 refer to the following simple program. stuff: iter: _start: loop: exit: in memory, the data section is allocated:
