ESE 345 Lecture Notes - Lecture 12: Instruction Set, Combinational Logic, Clock Signal

• School: Stony Brook University
• Department: Electrical Engineering
• Course: ESE 345
• Professor: Mikhail Dorojevets

Document Summary

The five classic components of a computer. Performance of a machine is determined by: Processor designs (datapath and control) will determine: How to designs a processor: step by step: analyze instruction set => datapath requirements, the meaning of each instruction is given by the register transfers, datapath mus include storage element for isa registers. All mips instructions are 32 bits long. Rs,rt,rd: the source and destination register specifiers. Funct: selects the variant of the operation in the op field. Address/immediate: address offset or immediate value target address: target address of the jump instruction. Register transfer language (rtl) gives the meaning of the instructions. Add and sub register or extended immediate. Add 4 or extended immediate to pc. Step 2: components of the datapath and clocking methodology. Similar to the d flip flop except. Negated (0): data out will not change. Asserted (1): data out will become data in. Two 32 bit output buses: busa and busb.