CS 3330 Midterm: CS 330 UVA Fall 2014Exam2key

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Directions: put the letter of your selection or the short answer requested in the box. Write clearly: if we are unsure what you wrote you will get a zero on that problem. If you do not sign the pledge on the last page you will get a zero on the entire quiz. Question 1: consider a two-stage pipeline: one stage has fetch and decode, the other has exe- cute, memory, and writeback. Condition code information is available at the end of the execute phase and might be needed at the beginning of the fetch stage of the next instruction. Using data forwarding, the pipeline-introduced delay associated with a branch would be at most. B 1 cycle f e- -f -e instead of f ef -e. Question 2: suppose we have an alu that might take several cycles to process a single operation. Consider a pipeline register earlier in the pipeline than the alu.

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