ESE 330 Study Guide - Final Guide: Pmos Logic, Miller Effect, Propagation Delay

28 views6 pages

Document Summary

Fanout: the number of load gates n that are connected to the output of the driving gate. Make input resistance of load gate as large as possible. Keep output resistance of the driving gate small. Fan in of a gate is the number of inputs to the gate. Vth is the gate voltage at which channel is. Dc points must be located at the intersection of corresponding load. For a dc operating point, currents through lines. Fast gate is built by keeping output capacitance small or by decreasing on-resistance of the transistor. Vm: switching threshold, defined as the point where vin = vout. Pmos and nmos always saturated since vds = vgs. Increasing width of transistor moves vm towards vdd or gnd. Vih and vil are the operational points of the inverter where the gain g of the amplifier is formed by the inverter, is equal to -1.

Get access

Grade+20% off
$8 USD/m$10 USD/m
Billed $96 USD annually
Grade+
Homework Help
Study Guides
Textbook Solutions
Class Notes
Textbook Notes
Booster Class
40 Verified Answers

Related Documents