ECE 2020 Midterm: ECE 2020 GT fa10 sw s2

• School: Georgia Tech
• Department: Electrical & Computer Engr
• Course: ECE 2020
• Professor: All

Document Summary

Part a (10 points) convert the following notations: Part b (12 points) for the 28 bit representations below, determine the most positive value and the step size (difference between sequential values). All answers should be expressed in decimal notation. Signed representations are two"s complement. representation most positive value step size unsigned fixed-point (26 bits) . (2 bits) signed integer (28 bits) . (0 bits) signed fixed-point (21 bits) . (7 bits) signed fixed-point (14 bits) . (14 bits) Part c (6 points) a 40 bit floating point representation has a 30 bit mantissa field, a 9 bit exponent field, and one sign bit. Part a (8 points) implement a transparent latch using only basics gates (and, or, nand, Part b (4 points) consider a register with a selectable write enable (we) and read enable (re). It is implemented with transparent latches, a 2to1 mux, and a pass gate. Describe its behavior by completing the output values.