COE 758 Midterm: COE758 - Fall 2003 Midterm (Solutions)

• School: Ryerson University
• Department: Computer Engineering
• Course: COE 758
• Professor: All

Document Summary

Ele 758 * digital systems engineering * midterm test * page 1. Design the 1gb (256m x 32 bit) ddr-sdram single-in-line-module (simm) using available ddr sdram chips (256m x 4 bits). Question # 1. 1 number of chips on simm needed = __8________ (1 mark) Question # 1. 2 number of data i/o pins on simm = ____32_____ (1 mark) Number of data i/o pins on the simm = ___________ Question # 1. 3 number of address pins on simm = ______14___ (2 marks) Average ddr sdram word access time = ____3. 375____ ns (4 marks) Cpu is coupled with direct-mapped cache 128 kb. Ele 758 * digital systems engineering * midterm test * page 2. The minimum information unit to be accessed is one byte. Main memory (ddr sdram) is 1 gb (256m x 32 bit organized) and connected with cache by the 333 mhz x 32 bit memory bus. Number of cache entries = ____1024_______ (3 marks)