ECE 391 Lecture 2: 01/17/19
Document Summary
86 length instruction encoding i 16 bytes architecture. 32 register set i 8 mostly general purpose variable small. 32 bit complex addressing modes many data types supported by hardware byte addressable address space. Registers a prefix for registers in assembly as use other registers floating point mmx etc in this class. 32 bit unsigned and 2 s complement precision floatingpoint single and double extended f p 80 bit strings. Microprocessor addresses different memory locations where f bits the address bus on a maximum of n is a. Memory a is x 86 supports byte addressable memory basic memory unit byte 8 bits e. g when you specify address 24 in memory you get. 16 bit word two consecutive bytes the entire 8 bits. Typically 2 operand instructions one source are the same destination and. How big can they get usually up to 32 bits larger constants length of operand must be encoded too longer instructions.