ECS 154A Lecture Notes - Lecture 17: Error Detection And Correction, Cyclic Redundancy Check, Conventional Pci
14 Jul 2016
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Lectures 17: point-to-point interconnect, pci express, and interrupts: point-to-point interconnect using the intel quick path interconnect (qpi) as an example. Needed because faster data rates do not allow enough time for the synchronization and arbitration functions of shared buses. In single core, replaces the front side bus between the processor and the north bridge. In multi-core, connect processors to processors and i/o hub. Rather than raw data, packets have control headers and error control codes. Physical layer = actual wires carrying the signals, and circuitry to support transmission of 1"s and 0"s. In qpi, the unit of transfer is 20 bits. Each bit takes a pair of wires called a lane. Each component has a set of 20 lanes for data transmission, 20 lanes for data receiving, as well as one clock lane for each direction, so 42 lanes, and thus. Transfer speed of 6. 4g transfers per second, so 6. 4 * 40 bits = 32g bytes/s.
