ESE 380 Lecture Notes - Lecture 4: Von Neumann Architecture, Instruction Register, Register File

• School: Stony Brook University
• Department: Electrical Engineering
• Course: ESE 380
• Professor: Kenneth Short

Document Summary

A computer"s architecture is characterized by the entire collection of registers that makes up on the computer, the data transfers that can take place between registers, and the transformations that can take place in operational registers. Different architectures exist to achieve different levels of performance within cost constraints. The performance of a computer architecture is dependent on the tasks the computer must perform. Its cpu architecture most impacts a computer system"s overall architecture. The data transfer rate (bandwidth (bits/second)) between the cpu and memory is small in comparison to the amount of memory. Bandwidth is also small in comparison with the rate at which the cpu can carry out computations. When the cpu executes a program that must perform minimal processing on large amounts of data the cpu must continually wait for data to be transferred to or from memory. As cpu speed and memory size increase, the von neumann bottleneck becomes a greater problem.