COMPSCI 61C Lecture Notes - Lecture 15: Clock Signal, Square Wave, Combinational Logic
23 Feb 2017
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Covers up to and including 02/15 lecture (call 2) 1 handwritten, double sided, 8. 5 x 11 cheat sheet. Emails sent out to students requiring special accommodation. Synchronous digital systems consist of two basic types of circuits: Output is a function of inputs only, not a history of its execution. Circuits that remember or store information aka state elements . Register les (like - in mips) Help control ow of information between combinational logic blocks. State elements hold up the movement of information at input to combinational logic blocks to allow for orderly passage. S = 0; for (i=0; i < n; i++) Flip- op name because the output ips and ops between 0 and 1. D is data input , q is data output . On the rising edge of the clock, the input d is sampled an transferred to the output. At all other times, the input d is ignored.
