ENVS 1000 Lecture Notes - Lecture 15: Interrupt, Nubus, Direct Memory Access
10 May 2018
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ENVS 1000 Tutorial 15 Notes – DMA Memory Access
Introduction
• The block diagram connects together many of the important concepts familiar to you.
• The PC is driven by one or more CPUs, which interface to memory and to the various I/O
peripherals and ports by one or more buses.
• A clock controls the operation of the CPU.
• Interrupt and direct memory access (DMA) capabilities are provided to enable rapid and
efficient I/O processing.
• L1 and L2 cache memory for each CPU is included within the same integrated circuit as
the CPU for most modern processors.
• Older systems also include an Industry Standard Architecture (ISA) bus or its 8-bit
predecessor on the IBM PC.
• The NuBus on an Apple Macintosh system.
• Today, the ISA bus is nearly obsolete, and multiple buses are used, to maximize data
transfer rates between components.
• The layout of a typical desktop PC, including the motherboard, case, and other
components.
• The wiring for the primary buses that interconnect the CPU and its peripheral
components is printed on the motherboard.
• Connectors on the motherboard combine with the frame of the case to hold the
motherboard and plug-in peripheral cards in place.
• Of course, the connectors on the motherboard provide the electrical connections
between the peripherals and the buses.
• The mainframe computer is packaged differently
• Since the mainframe computer is much larger physically, as well as operationally.
• Still, the essential components and operations are similar to those of the personal
computer.
• The basic pathways required in a CPU-memory-I/O system.
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