MGMT 1050 Chapter Notes - Chapter 13: Transmeta Crusoe, Itanium, Instruction Set
MGMT 1050 Chapter 13 Notes – Summary
Introduction
• VLIW architecture is represented by the Transmeta Crusoe and Efficeon families of CPU
processors.
• The Intel Itanium IA-64 series is based on EPIC architecture.
• The basic goal of each of these architectures is to increase execution speed by
processing instruction operations in parallel.
• The primary difficulty in doing so results from the inherently sequential order of the
instructions in a program.
• In particular, the data used in an instruction may depend on the result from a previous
instruction.
• This situation is known as a data dependency.
• Also, branches and loops may alter the sequence, resulting in control dependency.
• Data and control dependencies are discussed in more depth
• The Transmeta Crusoe architecture is based on a 128-bit instruction word called a
molecule.
• The molecule is divided into four 32-bit atoms.
• Each atom represents an operation similar to those of a normal 32-bit instruction word.
• However, the atoms are designed in such a way that all four operations may be
executed simultaneously in separate execution units.
• An example of a typical molecule.
• The Crusoe CPU provides 64 general-purpose registers to assure adequate register
space for rapid register-to-register processing.
• Although a programmer could write programs directly for a Crusoe CPU with the 128-bit
word instruction set, that is not the primary goal of the Crusoe architecture.
• Indeed, the fine details of the instruction set have not been publicly released to date.
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