CSE 120 Lecture Notes - Lecture 10: Page Table, Demand Paging, Segmentation Fault

• School: UCSD
• Department: Computer Science & Engineering
• Course: CSE 120
• Professor: Joseph Pasquale

Document Summary

The only time it will not fit is when you have no more physical memory! If my pages are framed as powers of 2 , then the physical address can be in the form (f,i) Where frame is the higher order bits. Page table - assume 1 pt per process. V: valid bit (information in the table is good) Location in memory given by: (i. e. where to find this page table) Page table base register ( ptbr) - in hardware. Page table size register ( ptsr) - also in hardware. Physical address: = frame of p + offset i. I. e. p is valid to index into the pt by comparing to ptsr ( is p < ptsr? ) Extract the frame # in the entry. Check permissions (can we write into the entry?) frame f. N bits for the page # 2 n entries in pt. Need to know: offset i the size of physical memory.