ITEC 1000 Lecture Notes - Lecture 6: Instruction Set, Access Control, Operand

• School: York University
• Department: Information Technology
• Course: ITEC 1000
• Professor: Peter A Khaiter

Document Summary

Contains the address of the current or next instrucion. Supervises fetching of instrucions and data from memory. Provides mechanism for input/output of data someimes combined with memory management unit in a single bus interface. Typically several dozen in modern cpus (r0, r1, ) Hold intermediate results or data values, e. g. , loop counters. To transfer data between diferent memory locaions and between i/0 and memory. Holds address of the currently executed instrucion. Holds the address of a memory locaion. Holds the actual data value from locaion speciied in mar. Flags (one-bit register) to track special condiions like arithmeic carry and overlow, power failure, internal computer error. Load values from other locaions (registers and memory) Address from an instrucion is copied to the mar which inds the locaion in memory. Cpu determines if it is a store or retrieval. Transfer takes place between the mdr and memory. Determined by two factors: number of bits in the mar.